Zilog Z8 Encore! Macro Assembler Version 2.50 (08031703) 13-Oct-08 14:30:22 page: 1 PC Object I Line Source A 1 ; Zilog Z8 Encore! ANSI C Compiler Release 3.60 A 2 ; -nofastcall -const=RAM -model=L -nooptlink -regvar A 3 ; -noreduceopt -debug -revaa -peephole -localcse -optsize A 4 ; -alias A 5 DEFINE gpio_TEXT,SPACE=ROM A 6 FILE ".\GPIO.C" A 7 .debug "C" A 8 SEGMENT ROM_DATA A 9 A 10 A 11 ;**************************** _init_led_gpio *************************** A 12 ;Name Addr/Register Size Type A 13 A 14 A 15 ; Aggregate Stack Size: 0 (words) A 16 A 17 A 18 .FRAME _n_init_led_gpio,?_n_init_led_gpio,RDATA A 19 .FRAME _f_init_led_gpio,?_f_init_led_gpio,EDATA A 20 SEGMENT gpio_TEXT 000000 A 21 _init_led_gpio: A 22 .define "_init_led_gpio" A 23 .value _init_led_gpio A 24 .class 2 A 25 .type 65 A 26 .type 0 A 27 .endef A 28 .begfunc "init_led_gpio",14,"_init_led_gpio" A 29 ; 1 /************************************************* A 30 ; 2 * Copyright (C) 1999-2004 by ZiLOG, Inc. A 31 ; 3 * All Rights Reserved A 32 ; 4 *************************************************/ A 33 ; 5 A 34 ; 6 #include A 35 ; 7 A 36 ; 8 /////////////////////////////////////////////////////// A 37 ; 9 // Initializes LED ports - Port A A 38 ; 10 // A 39 ; 11 A 40 ; 12 A 41 ; 13 void init_led_gpio(void) A 42 ; 14 { A 43 ; 15 A 44 ; 16 PAADDR = 0x01; // PA Data Dir = A 45 .line 16 000000 E9010FD0 A 46 LDX 4048,#1 A 47 ; 17 PACTL &= 0x00; // PA6-PA7 as Output A 48 .line 17 000004 E9000FD1 A 49 LDX 4049,#-0 A 50 ; 18 A 51 ; 19 PBADDR = 0x01; A 52 .line 19 Zilog Z8 Encore! Macro Assembler Version 2.50 (08031703) 13-Oct-08 14:30:22 page: 2 PC Object I Line Source gpio.src 000008 E9010FD4 A 53 LDX 4052,#1 A 54 ; 20 PBCTL= 0x10; A 55 .line 20 00000C E9100FD5 A 56 LDX 4053,#16 A 57 ; 21 A 58 ; 22 PCADDR = 0x01; // PC Data Dir A 59 .line 22 000010 E9010FD8 A 60 LDX 4056,#1 A 61 ; 23 PCCTL = 0xF0; // PC7..PC4 input, Pc3..Pc0 as Output A 62 .line 23 000014 E9F00FD9 A 63 LDX 4057,#240 A 64 ; 24 A 65 ; 25 A 66 ; 26 PDADDR = 0x02; A 67 .line 26 000018 E9020FDC A 68 LDX 4060,#2 A 69 ; 27 PDCTL = 0x00; A 70 .line 27 00001C E9000FDD A 71 LDX 4061,#-0 A 72 ; 28 PDADDR= 0x01; A 73 .line 28 000020 E9010FDC A 74 LDX 4060,#1 A 75 ; 29 PDCTL= 0x00; A 76 .line 29 000024 E9000FDD A 77 LDX 4061,#-0 A 78 ; 30 PDADDR = 0x3; A 79 .line 30 000028 E9030FDC A 80 LDX 4060,#3 A 81 ; 31 PDCTL = 0x00; // source enable A 82 .line 31 00002C E9000FDD A 83 LDX 4061,#-0 A 84 ; 32 A 85 ; 33 PBOUT = 0xFF; A 86 .line 33 000030 E9FF0FD7 A 87 LDX 4055,#255 A 88 ; 34 PDOUT = 0x01; A 89 .line 34 000034 E9010FDF A 90 LDX 4063,#1 A 91 ; 35 } A 92 .line 35 000038 AF A 93 RET A 94 .endfunc "init_led_gpio",35,"_init_led_gpio" A 95 XDEF _init_led_gpio A 96 END Errors: 0 Warnings: 0 Lines Assembled: 97