Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 1 PC Object I Line Source A 1 ; Zilog Z8 Encore! ANSI C Compiler Release 3.62 A 2 ; -nolocalcse -optsize -nofastcall -const=RAM - A 3 ; -nooptlink -noregvar -reduceopt -debug -norev A 4 ; -alias A 5 DEFINE uart_TEXT,SPACE=ROM A 6 FILE ".\UART.C" A 7 .debug "C" A 8 SEGMENT NEAR_DATA 000000 A 9 _rx: 000000 00 A 10 DB 0 000001 00 A 11 DB 0 000002 00 A 12 DB 0 000003 00 A 13 DB 0 000004 00 A 14 DB 0 000005 00 A 15 DB 0 000006 00 A 16 DB 0 A 17 .define "rx" A 18 .alias "_rx" A 19 .class 133 A 20 .value _rx A 21 .dim 7 A 22 .type 98 A 23 .type 0 A 24 .endef A 25 SEGMENT uart_TEXT A 26 .begrec "fmt_type",13 A 27 .define "status" A 28 .value 0 A 29 .class 8 A 30 .type 12 A 31 .type 0 A 32 .endef A 33 .define "flags" A 34 .value 1 A 35 .class 8 A 36 .type 12 A 37 .type 0 A 38 .endef A 39 .define "size" A 40 .value 2 A 41 .class 8 A 42 .type 2 A 43 .type 0 A 44 .endef A 45 .define "chr" A 46 .value 3 A 47 .class 8 A 48 .type 2 A 49 .type 0 A 50 .endef A 51 .define "type" A 52 .value 4 Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 2 PC Object I Line Source uart.src A 53 .class 8 A 54 .type 2 A 55 .type 0 A 56 .endef A 57 .define "field_width" A 58 .value 5 A 59 .class 8 A 60 .type 2 A 61 .type 0 A 62 .endef A 63 .define "precision" A 64 .value 6 A 65 .class 8 A 66 .type 2 A 67 .type 0 A 68 .endef A 69 .define "set_begin" A 70 .value 7 A 71 .class 8 A 72 .type 130 A 73 .type 0 A 74 .endef A 75 .define "set_end" A 76 .value 8 A 77 .class 8 A 78 .type 130 A 79 .type 0 A 80 .endef A 81 .define "pad_whole" A 82 .value 9 A 83 .class 8 A 84 .type 12 A 85 .type 0 A 86 .endef A 87 .define "pad_pre_fract" A 88 .value 10 A 89 .class 8 A 90 .type 12 A 91 .type 0 A 92 .endef A 93 .define "pad_post_fract" A 94 .value 11 A 95 .class 8 A 96 .type 12 A 97 .type 0 A 98 .endef A 99 .define "pad_at" A 100 .value 12 A 101 .class 8 A 102 .type 130 A 103 .type 0 A 104 .endef Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 3 PC Object I Line Source uart.src A 105 .endrec "fmt_type" A 106 .begrec "flt_info",12 A 107 .define "flags" A 108 .value 0 A 109 .class 8 A 110 .type 12 A 111 .type 0 A 112 .endef A 113 .define "exp" A 114 .value 1 A 115 .class 8 A 116 .type 2 A 117 .type 0 A 118 .endef A 119 .define "digits" A 120 .value 2 A 121 .class 8 A 122 .dim 10 A 123 .type 108 A 124 .type 0 A 125 .endef A 126 .endrec "flt_info" A 127 .begrec "NONAME0",6 A 128 .define "baudRate" A 129 .value 0 A 130 .class 8 A 131 .type 5 A 132 .type 0 A 133 .endef A 134 .define "stopBits" A 135 .value 4 A 136 .class 8 A 137 .type 12 A 138 .type 0 A 139 .endef A 140 .define "parity" A 141 .value 5 A 142 .class 8 A 143 .type 12 A 144 .type 0 A 145 .endef A 146 .endrec "NONAME0" A 147 .begrec "NONAME1",4 A 148 .define "pBuffer" A 149 .value 0 A 150 .class 8 A 151 .type 140 A 152 .type 0 A 153 .endef A 154 .define "next_in" A 155 .value 1 A 156 .class 8 Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 4 PC Object I Line Source uart.src A 157 .type 12 A 158 .type 0 A 159 .endef A 160 .define "next_out" A 161 .value 2 A 162 .class 8 A 163 .type 12 A 164 .type 0 A 165 .endef A 166 .define "size" A 167 .value 3 A 168 .class 8 A 169 .type 12 A 170 .type 0 A 171 .endef A 172 .endrec "NONAME1" A 173 SEGMENT NEAR_BSS 000000 A 174 _rxptr: 000000 A 175 DS 1 A 176 .define "rxptr" A 177 .alias "_rxptr" A 178 .class 147 A 179 .value _rxptr A 180 .type 130 A 181 .type 0 A 182 .endef A 183 SEGMENT NEAR_DATA 000007 A 184 _rxmax: 000007 00 A 185 DB 0 A 186 .define "rxmax" A 187 .alias "_rxmax" A 188 .class 133 A 189 .value _rxmax A 190 .type 2 A 191 .type 0 A 192 .endef 000008 A 193 _rxready: 000008 00 A 194 DB 0 A 195 .define "rxready" A 196 .alias "_rxready" A 197 .class 133 A 198 .value _rxready A 199 .type 2 A 200 .type 0 A 201 .endef A 202 SEGMENT ROM_DATA A 203 A 204 A 205 ;**************************** _isr_uart0_rx *** A 206 ;Name Addr/Register S A 207 ;_rxmax STATIC A 208 ;_rxptr STATIC Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 5 PC Object I Line Source uart.src A 209 ;_rx STATIC A 210 ;_getchar IMPORT -- A 211 ;_rxready STATIC A 212 ;rxcom R15-2 A 213 ;chksum R15-1 A 214 A 215 A 216 ; Aggregate Stack Size: -2 (words) A 217 A 218 A 219 .FRAME _n_isr_uart0_rx,?_n_isr_uart0_rx,RDA A 220 .FCALL _n_getchar A 221 SEGMENT uart_TEXT 000000 A 222 _isr_uart0_rx: A 223 .define "_isr_uart0_rx" A 224 .value _isr_uart0_rx A 225 .class 2 A 226 .type 65 A 227 .type 0 A 228 .endef A 229 .begfunc "isr_uart0_rx",30,"_isr_uart0_rx" A 230 ; 1 /************************************** A 231 ; 2 * Copyright (C) 1999-2004 by ZiLOG, A 232 ; 3 * All Rights Reserved A 233 ; 4 ************************************** A 234 ; 5 A 235 ; 6 #include A 236 ; 7 #include A 237 ; 8 #include // non-standard I/O A 238 ; 9 #include "main.h" A 239 ; 10 #include "uart.h" A 240 ; 11 A 241 ; 12 char rx[7]=0; A 242 ; 13 char *rxptr; A 243 ; 14 char rxmax=0; A 244 ; 15 char rxready=0; A 245 ; 16 A 246 ; 17 /////////////////////////////////////// A 247 ; 18 //Interrupt routine A 248 ; 19 // A 249 ; 20 // Transmission format: stx + motor + c A 250 ; 21 // stx = 0x02 A 251 ; 22 // cksum = 7 bit checksum, bit 7 always A 252 ; 23 // motor= 2 bytes A 253 ; 24 // command = 1 byte A 254 ; 25 // parameter = 2 bytes A 255 ; 26 // total : 7 bytes A 256 ; 27 A 257 ; 28 #pragma interrupt A 258 ; 29 void isr_uart0_rx(void) A 259 ; 30 { A 260 .define "chksum" Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 6 PC Object I Line Source uart.src A 261 .class 1 A 262 .value -1 A 263 .type 12 A 264 .type 0 A 265 .endef A 266 .define "rxcom" A 267 .class 1 A 268 .value -2 A 269 .type 2 A 270 .type 0 A 271 .endef 000000 C8FFD0 A 272 PUSHX 4093 000003 E8 000FFD A 273 LDX 4093,__intrp 000007 09100000 A 274 ADDX __intrp,#16 00000B 70EF A 275 PUSH R15 00000D 84FFFF A 276 LDX R15,4095 000010 29020FFF A 277 SUBX 4095,#2 A 278 ; 31 char header; A 279 ; 32 char rxcom; A 280 ; 33 char unsigned chksum; A 281 ; 34 A 282 ; 35 // service Rx when system is ready A 283 ; 36 if(rxready==0) A 284 .line 36 000014 A6 08 00 A 285 CP _rxready,#0 000017 EB 63 A 286 JR NE,_1_L_9 A 287 ; 37 { A 288 ; 38 rxcom=getchar(); // read A 289 .line 38 000019 D6 0000 A 290 CALL _getchar 00001C D71FFE A 291 LD -2(R15),R1 A 292 ; 39 if(rxcom==2) // Stx? A 293 .line 39 00001F C70FFE A 294 LD R0,-2(R15) 000022 A6E002 A 295 CP R0,#2 000025 EB 07 A 296 JR NE,_1_L_7 A 297 ; 40 { A 298 ; 41 rxptr=rx; //Start A 299 .line 41 000027 E6 00 00 A 300 LD _rxptr,#_rx A 301 ; 42 rxmax=0; //reset A 302 .line 42 00002A B0 07 A 303 CLR _rxmax A 304 ; 43 } A 305 ; 44 else A 306 .line 44 00002C 8B 4E A 307 JR _1_L_9 00002E A 308 _1_L_7: A 309 ; 45 { A 310 ; 46 rxmax++; A 311 .line 46 00002E 20 07 A 312 INC _rxmax Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 7 PC Object I Line Source uart.src A 313 ; 47 *rxptr=rxcom; // stor A 314 .line 47 000030 E4 00 E0 A 315 LD R0,_rxptr 000033 C71FFE A 316 LD R1,-2(R15) 000036 F301 A 317 LD @R0,R1 A 318 ; 48 rxptr++; A 319 .line 48 000038 20 00 A 320 INC _rxptr A 321 ; 49 if(rxmax==6) // 7 ch A 322 .line 49 00003A A6 07 06 A 323 CP _rxmax,#6 00003D EB 3D A 324 JR NE,_1_L_9 A 325 ; 50 { A 326 ; 51 chksum=2+rx[0]+rx[1]+rx A 327 .line 51 00003F E4 00 E0 A 328 LD R0,_rx 000042 06E002 A 329 ADD R0,#2 000045 04 01 E0 A 330 ADD R0,_rx+1 000048 04 02 E0 A 331 ADD R0,_rx+2 00004B 04 03 E0 A 332 ADD R0,_rx+3 00004E 04 04 E0 A 333 ADD R0,_rx+4 000051 D70FFF A 334 LD -1(R15),R0 A 335 ; 52 chksum=chksum | 0x80; A 336 .line 52 000054 C70FFF A 337 LD R0,-1(R15) 000057 E2F0 A 338 BSET 7,R0 000059 D70FFF A 339 LD -1(R15),R0 A 340 ; 53 if(chksum==rx[5]) A 341 .line 53 00005C E4 05 E0 A 342 LD R0,_rx+5 00005F 90E0 A 343 RL R0 000061 3200 A 344 SBC R0,R0 000063 C71FFF A 345 LD R1,-1(R15) 000066 A4E1 05 A 346 CP _rx+5,R1 000069 1FA6E000 A 347 CPC R0,#-0 00006D EB 05 A 348 JR NE,_1_L_3 A 349 ; 54 rxready=1; // A 350 .line 54 00006F E6 08 01 A 351 LD _rxready,#1 A 352 ; 55 else A 353 .line 55 000072 8B 03 A 354 JR _1_L_4 000074 A 355 _1_L_3: A 356 ; 56 rxready=2; //c A 357 .line 56 000074 E6 08 02 A 358 LD _rxready,#2 000077 A 359 _1_L_4: A 360 ; 57 rxptr=rx; // rese A 361 .line 57 000077 E6 00 00 A 362 LD _rxptr,#_rx A 363 ; 58 rxmax=0; A 364 .line 58 Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 8 PC Object I Line Source uart.src 00007A B0 07 A 365 CLR _rxmax A 366 ; 59 } A 367 ; 60 } A 368 ; 61 } A 369 ; 62 A 370 ; 63 } 00007C A 371 _1_L_9: A 372 .line 63 00007C 94FFFF A 373 LDX 4095,R15 00007F 50EF A 374 POP R15 000081 29100000 A 375 SUBX __intrp,#16 000085 D8FFD0 A 376 POPX 4093 000088 BF A 377 IRET A 378 .endfunc "isr_uart0_rx",63,"_isr_uart0_rx" A 379 SEGMENT ROM_DATA A 380 A 381 A 382 ;**************************** _init_uart0 ***** A 383 ;Name Addr/Register S A 384 ;_SET_VECTOR IMPORT -- A 385 ;_select_port IMPORT -- A 386 ;_get_freq IMPORT -- A 387 ;_init_uart IMPORT -- A 388 A 389 A 390 ; Aggregate Stack Size: 0 (words) A 391 A 392 A 393 .FRAME _n_init_uart0,?_n_init_uart0,RDATA A 394 .FCALL _n_init_uart A 395 .FCALL _n_get_freq A 396 .FCALL _n_select_port A 397 SEGMENT uart_TEXT 000089 A 398 _init_uart0: A 399 .define "_init_uart0" A 400 .value _init_uart0 A 401 .class 2 A 402 .type 65 A 403 .type 0 A 404 .endef A 405 .begfunc "init_uart0",68,"_init_uart0" 000089 70EF A 406 PUSH R15 00008B 84FFFF A 407 LDX R15,4095 A 408 ; 64 A 409 ; 65 /////////////////////////////////////// A 410 ; 66 //Intialize UART 0 A 411 ; 67 void init_uart0(void) A 412 ; 68 { A 413 ; 69 init_uart(_UART0,_DEFFREQ,BAUD_1152 A 414 .line 69 00008E 1F7000 A 415 PUSH #0 000091 1F70C2 A 416 PUSH #194 Zilog Z8 Encore! Macro Assembler Version 2.52 (10101401) 17-Feb-12 10:15:51 page: 9 PC Object I Line Source uart.src 000094 1F7001 A 417 PUSH #1 000097 1F7000 A 418 PUSH #0 00009A D6 0000 A 419 CALL _get_freq 00009D 70E3 A 420 PUSH R3 00009F 70E2 A 421 PUSH R2 0000A1 70E1 A 422 PUSH R1 0000A3 70E0 A 423 PUSH R0 0000A5 1F7000 A 424 PUSH #0 0000A8 1F7000 A 425 PUSH #0 0000AB D6 0000 A 426 CALL _init_uart 0000AE 090A0FFF A 427 ADDX 4095,#10 A 428 ; 70 select_port(_UART0); A 429 .line 70 0000B2 1F7000 A 430 PUSH #0 0000B5 1F7000 A 431 PUSH #0 0000B8 D6 0000 A 432 CALL _select_port 0000BB 50E0 A 433 POP R0 0000BD 50E0 A 434 POP R0 A 435 ; 71 SET_VECTOR(UART0_RX, isr_uart0_rx); A 436 ; 72 IRQ0ENH |= 0x10; A 437 .line 72 0000BF 49100FC1 A 438 ORX 4033,#16 A 439 ; 73 IRQ0ENL |= 0x10; A 440 .line 73 0000C3 49100FC2 A 441 ORX 4034,#16 A 442 ; 74 } A 443 .line 74 0000C7 50EF A 444 POP R15 0000C9 AF A 445 RET A 446 .endfunc "init_uart0",74,"_init_uart0" 00000E 0000 A 447 VECTOR UART0_RX=_isr_uart0_rx A 448 XREF _select_port:ROM A 449 XREF _init_uart:ROM A 450 XREF _getchar:ROM A 451 XREF _get_freq:ROM A 452 XREF __intrp:RDATA A 453 XDEF _init_uart0 A 454 XDEF _isr_uart0_rx A 455 XDEF _rxready A 456 XDEF _rxmax A 457 XDEF _rxptr A 458 XDEF _rx A 459 END Errors: 0 Warnings: 0 Lines Assembled: 460